1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device.
2. Background Art
To enhance the switching speed of semiconductor devices, a silicide layer lower in specific resistance than polysilicon is often formed on the gate electrode. To form the silicide layer On the gate electrode, the gate electrode and a source/drain diffusion layer are first formed on a semiconductor substrate; a metal layer is next deposited on the semiconductor substrate; and the semiconductor substrate is annealed. In this process, thickness of the silicide layer usually depends on the thickness of the metal layer.
There is a recent proposal to form on a common semiconductor substrate both a MOSFET in which the gate electrode is entirely silicided (hereafter called a full silicide MOSFET) and a MOSFET in which the upper part of the gate electrode is locally silicided (hereafter called a non-full silicide MOSFET). Heretofore, a process using photolithography has been used to locally retain a silicon oxide film or other mask material in a desired region such that a relatively thick metal layer deposits in the region for the full silicide MOSFET (hereafter called a full silicide region) while a relatively thin metal layer deposits in the region for the non-full silicide MOSFET (hereafter called a non-full silicide region). In this process, the gate electrode in the full silicide region is entirely silicided whereas the gate electrode in the non-full silicide region is partly silicided only in the top portion thereof. In this manner, the conventional technique locally made the full silicide MOSFET and the non-full silicide MOSFET in different regions on a common semiconductor substrate.
However, removal of the mask material after deposition of the metal layers invites the problem of undesirable etching of sidewall protection films of the gate electrodes and the silicide layer.
Furthermore, since the silicide layer is formed to spread over the source and drain layers of the MOSFETs, the silicide layer on the source and drain layer of the full silicide MOSFET becomes thicker than that of the non-full silicide MOSFET. This may invite junction leakage.
It might be possible to use a process of forming a silicide by exposing the gate electrodes alone. This process, however, cannot form a silicide on the source and drain layer (see Kedzierski et al., “Issues in NiSi-gated FDSOI device integration”, IEDM Tech. Dig., 2003, pp. 441-444).
To overcome these problems, here is provided a semiconductor device having transistors that include silicides different in thickness in their gate electrodes in a common substrate and can prevent junction leakage in their source and the drain.